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AT86RF232
11.4 RX and TX Frame Time Stamping (TX_ARET)
11.4.1 Overview
An exact timing of received and transmitted frames is signaled by Atmel AT86RF232
pin 10 (DIG2). A valid PHR reception or start of frame transmission is indicated by a
DIG2 posedge. The pin remains high during frame reception or transmission. TX Frame
Time Stamping is limited to TX_ARET, whereas the RX Frame Time Stamping is
available for all receive modes. Exemplary, Figure 11-12 illustrates a frame reception
example.
Figure 11-12. Timing of RX_START and DIG2 for RX Frame Time Stamping.
0
128
160
192
192 + m * 32
Time [μs]
Number of Octets
Frame Content
TRX_STATE
4
Preamble
RX_ON
1
SFD
1
PHR
m < 128
PSDU (250 kb/s)
BUSY_RX
RX_ON
DIG2 (RX Frame Time Stamp)
IRQ
Interrupt latency
IRQ_2 (RX_START)
t IRQ
TRX_END
t IRQ
Note:
1.
Timing figures t IRQ refer to Section 12.4 .
If pin 10 (DIG2) is not used for RX and/or TX Frame Time Stamping, or Antenna
Diversity, it is pulled-down to digital ground.
11.4.2 Register Description
Register 0x04 (TRX_CTRL_1):
The TRX_CTRL_1 register is a multi-purpose register to control various operating
modes and settings of the radio transceiver.
Figure 11-13 . Register TRX_CTRL_1.
Bit
7
6
5
4
0x04
Read/Write
Reset value
Bit
reserved
R/W
0
3
IRQ_2_EXT_EN
R/W
0
2
TX_AUTO_CRC_
ON
R/W
1
1
RX_BL_CTRL
R/W
0
0
TRX_CTRL_1
0x04
SPI_CMD_MODE
IRQ_MASK_MODE
IRQ_POLARITY
TRX_CTRL_1
Read/Write
Reset value
R/W
0
R/W
0
R/W
1
R/W
0
139
8321A – MCU Wireless – 10/11
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